摘要

CPLD实现的8位数字频率计用ALTERA开发的Max+PlusⅡ软件编译。8位数字频率计由分频电路模块CNT1000，控制电路模块Fre_ctrl， 计数电路模块CNT32BITE，锁存电路模块DEFF32BITE和译码显示电路模块DISPLAY组成，用ZYE1502B型实验箱和EPM7128SLC84-15芯片实现仿真。
关键词：
Max+PlusⅡ软件 8位数字频率计 VHDL AHDL
Abstract: 8 figures digital frequency meter realized by CPLD is compiled with MAX+PlusⅡsoftware which was developed by ALTERA. 8 figures digital frequency meter consists of the frequency dividing circuit module CNT1000, the control circuit module Fre_ctrl, the counter circuit module CNT32BITE, the locking circuit module DFF32BITE and decoding & display circuit module DISPLAY. The experimental box ZYE1502B and EPM7128SLC84-15 CMOS chip are used to realize simulation.
Keywords: Max+plus II Software 8 figures digital frequency meter VHDL AHDL